Test pattern decompression techniques are bounded with the algorithm of test pattern ordering and test data flow controlling. Some of the methods could have more sophisticated sor...
This paper proposes a new test pattern generator (TPG) which is an enhancement of GLFSR (Galois LFSR). This design is based on certain non–binary error detecting codes, formulat...
This paper presents a comparative analysis of neural networks, simulated annealing, and genetic algorithms in the determination of input patterns for testing analog circuits. The ...
This paper introduces a Built-In Self Test (BIST) structure referred to as Universal BIST (UBIST). The Test Pattern Generator (TPG) of the proposed UBIST is designed to generate an...
Sukanta Das, Niloy Ganguly, Biplab K. Sikdar, Pari...
The paper presents a novel hierarchical approach to test pattern generation for sequential circuits based on an input model of mixed-level decision diagrams. A method that handles,...