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DATE
2009
IEEE
78views Hardware» more  DATE 2009»
14 years 4 months ago
QC-Fill: An X-Fill method for quick-and-cool scan test
— In this paper, we present an X-Fill (QC-Fill) method for not only slashing the test time but also reducing the test power (including both capture power and shifting power). QC-...
Chao-Wen Tzeng, Shi-Yu Huang
FLAIRS
2010
14 years 12 days ago
Mining Actionable Patterns
We propose a generic framework that uses utility in decision making to drive the data mining process. We use concepts from meta-learning and build on earlier work by Elovici and B...
Prabakararaj Swapna Raj, Ravindran Balaraman
VTS
2008
IEEE
83views Hardware» more  VTS 2008»
14 years 4 months ago
LS-TDF: Low-Switching Transition Delay Fault Pattern Generation
— Higher chip densities and the push for higher performance have continued to drive design needs. Transition delay fault testing has become the preferred method for ensuring thes...
Jeremy Lee, Mohammad Tehranipoor
ITC
2003
IEEE
123views Hardware» more  ITC 2003»
14 years 3 months ago
Hysteresis of Intrinsic IDDQ Currents
: Empirical analyses of the IDDQ signatures of 0.18 µm devices indicate that IDDQ currents exhibit hysteresis. A newly proposed test method, SPIRIT (Single Pattern Iteration IDDQ ...
Yukio Okuda, Nobuyuki Furukawa
ICCAD
1995
IEEE
136views Hardware» more  ICCAD 1995»
14 years 1 months ago
A controller-based design-for-testability technique for controller-data path circuits
This paper investigates the effect of the controller on the testability of sequential circuits composed of controllers and data paths. It is shown that even when both the controll...
Sujit Dey, Vijay Gangaram, Miodrag Potkonjak