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» Testing embedded-core based system chips
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TVLSI
2008
152views more  TVLSI 2008»
13 years 6 months ago
MMV: A Metamodeling Based Microprocessor Validation Environment
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...
VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
14 years 7 months ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
MICRO
2007
IEEE
159views Hardware» more  MICRO 2007»
14 years 1 months ago
Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation
As silicon process technology scales deeper into the nanometer regime, hardware defects are becoming more common. Such defects are bound to hinder the correct operation of future ...
Kypros Constantinides, Onur Mutlu, Todd M. Austin,...
BMCBI
2007
203views more  BMCBI 2007»
13 years 7 months ago
A Grid-based solution for management and analysis of microarrays in distributed experiments
Several systems have been presented in the last years in order to manage the complexity of large microarray experiments. Although good results have been achieved, most systems ten...
Ivan Porro, Livia Torterolo, Luca Corradi, Marco F...
NOCS
2007
IEEE
14 years 1 months ago
Transaction-Based Communication-Centric Debug
Abstract— The behaviour of systems on chip (SOC) is complex because they contain multiple processors that interact through concurrent interconnects, such as networks on chip (NOC...
Kees Goossens, Bart Vermeulen, Remco van Steeden, ...