48 search results - page 3 / 10 » The Chimaera reconfigurable functional unit |
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
This paper shows that software pipelining can be an effective technique for code generation for coarse-grained reconfigurable instruction set processors. The paper describes a tec...
ICRA
1998
IEEE
14 years 5 days ago
1998
IEEE
: A three-dimensional, self-reconfigurable structure is proposed. The structure is a fully distributed system composed of many identical 3-D units. Each unit has functions of chang...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
In modern SoCs, embedded memories occupy the largest part of the chip area and include an even larger amount of active devices. As memories are designed very tightly to the limits...
DATE
2002
IEEE
14 years 26 days ago
2002
IEEE
In this paper, we investigate the benefits of a flexible, application-specific instruction set by adding a run-time Reconfigurable Functional Unit (RFU) to a VLIW processor. Preli...
ERSA
2009
13 years 5 months ago
2009
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...