Operating frequency of a pipelined circuit is determined by the delay of the slowest pipeline stage. However, under statistical delay variation in sub-100nm technology regime, the...
Abstract--This paper is concerned with the robust synchronization problem for an array of coupled stochastic discrete-time neural networks with time-varying delay. The individual n...
Variations in the semiconductor fabrication process results in variability in parameters between transistors on the same die, a problem exacerbated by lithographic scaling. The re...
Unlike their hard realtime counterparts, soft realtime applications are only expected to guarantee their ”expected delay” over input data space. This paradigm shift calls for ...
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
Dimitrios Velenis, Marios C. Papaefthymiou, Eby G....