867 search results - page 135 / 174 » The Design and Performance of a Conflict-Avoiding Cache |
168
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ISPASS
2005
IEEE
15 years 11 months ago
2005
IEEE
Performance evaluation using only a subset of programs from a benchmark suite is commonplace in computer architecture research. This is especially true during early design space e...
169
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ASPLOS
2006
ACM
15 years 7 months ago
2006
ACM
Different uses of memory protection schemes have different needs in terms of granularity. For example, heap security can benefit from chunk separation (by using protected "pa...
168
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ASPLOS
2010
ACM
16 years 21 days ago
2010
ACM
DRAM is facing severe scalability challenges in sub-45nm technology nodes due to precise charge placement and sensing hurdles in deep-submicron geometries. Resistive memories, suc...
175
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ISCA
2006
IEEE
15 years 12 months ago
2006
IEEE
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
173
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ISCA
2005
IEEE
15 years 11 months ago
2005
IEEE
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...