356 search results - page 63 / 72 » The Dynamic Enterprise Bus |
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...
CODES
2007
IEEE
14 years 2 months ago
2007
IEEE
Embedded single-chip heterogeneous multiprocessor (SCHM) systems experience frequent system events such as task preemption, power-saving voltage/frequency scaling, or arrival of n...
HIPEAC
2007
Springer
14 years 2 months ago
2007
Springer
The XScale processor family provides user-controllable independent configuration of CPU, bus, and memory frequencies. This feature introduces another handle for the code optimizat...
PACS
2004
Springer
14 years 1 months ago
2004
Springer
Dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The delay ...
ICPP
2003
IEEE
14 years 1 months ago
2003
IEEE
Aggressive hardware-based and software-based prefetch algorithms for hiding memory access latencies were proposed to bridge the gap of the expanding speed disparity between proces...