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» The ISPD98 circuit benchmark suite
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DAC
2007
ACM
14 years 10 months ago
Confidence Scalable Post-Silicon Statistical Delay Prediction under Process Variations
Due to increased variability trends in nanoscale integrated circuits, statistical circuit analysis has become essential. We present a novel method for post-silicon analysis that g...
Qunzeng Liu, Sachin S. Sapatnekar
ICCAD
1997
IEEE
122views Hardware» more  ICCAD 1997»
14 years 2 months ago
Approximate timing analysis of combinational circuits under the XBD0 model
This paper is concerned with approximate delay computation algorithms for combinational circuits. As a result of intensive research in the early 90’s [3, 8] efficient tools exi...
Yuji Kukimoto, Wilsin Gosti, Alexander Saldanha, R...
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Safe Delay Optimization for Physical Synthesis
-- Physical synthesis is a relatively young field in Electronic Design Automation. Many published optimizations for physical synthesis end up hurting the final result, often by neg...
Kai-Hui Chang, Igor L. Markov, Valeria Bertacco
ICCD
2001
IEEE
119views Hardware» more  ICCD 2001»
14 years 6 months ago
A Functional Validation Technique: Biased-Random Simulation Guided by Observability-Based Coverage
We present a simulation-based semi-formal verification method for sequential circuits described at the registertransfer level. The method consists of an iterative loop where cove...
Serdar Tasiran, Farzan Fallah, David G. Chinnery, ...
HIPC
2004
Springer
14 years 3 months ago
A Parallel State Assignment Algorithm for Finite State Machines
This paper summarizes the design and implementation of a parallel algorithm for state assignment of large Finite State Machines (FSMs). High performance CAD tools are necessary to...
David A. Bader, Kamesh Madduri