—This paper presents a method to optimize the power consumption of a pipelined ADC with kT/C noise constraint. The total power dependence on capacitor scaling and stage resolutio...
Yu Lin, Vipul Katyal, Mark Schlarmann, Randall L. ...
Many embedded systems are subject to temporal constraints that require advance guarantees on meeting deadlines. Such systems rely on static analysis to safely bound worst-case exe...
We introduce a framework for texturing volumetric objects with displacement maps and texture maps, which are introduced as volume modeling tools. In this framework, an implicit-to...
Abstract—This paper presents a method to investigate powerperformance tradeoffs in digital pipelined designs. The method is applied at the architectural level of the design. It w...
We present a method for pipeline verification using SMT solvers. It is based on a non-deterministic “mother pipeline” machine (MOP) that abstracts the instruction set archite...