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ITC
2003
IEEE
149views Hardware» more  ITC 2003»
15 years 11 months ago
BIST for Xilinx 4000 and Spartan Series FPGAs: A Case Study
Abstract: We discuss the development of Built-In SelfTest (BIST) configurations that test all of the programmable logic and interconnect resources in the core of Xilinx 4000E, 4000...
Charles E. Stroud, Keshia N. Leach, Thomas A. Slau...
PDP
2003
IEEE
15 years 11 months ago
A Parallel Evolutionary Algorithm for Circuit Partitioning
As general-purpose parallel computers are increasingly being used to speed up different VLSI applications, the development of parallel algorithms for circuit testing, logic minimi...
Raul Baños, Consolación Gil, Maria D...
PVG
2003
IEEE
165views Visualization» more  PVG 2003»
15 years 11 months ago
A PC Cluster System for Simultaneous Interactive Volumetric Modeling and Visualization
A number of problems are well suited for volumetric representation for both simulation and storage, however, the large amount of data that needs to be processed and rendered with ...
Shigeru Muraki, Eric B. Lum, Kwan-Liu Ma, Masato O...
EGOV
2003
Springer
15 years 11 months ago
Language and Technology Literacy Barriers to Accessing Government Services
The paper presents research aimed at overcoming barriers to citizens’ ability to access electronic government services. Our concern is specifically ‘non-connectivity'barri...
Etienne Barnard, Laurens Cloete, Hina Patel
FPL
2003
Springer
100views Hardware» more  FPL 2003»
15 years 11 months ago
Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
Nazar A. Saqib, Francisco Rodríguez-Henr&ia...