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ICTAI
1997
IEEE
14 years 1 months ago
Exploiting Symbolic Techniques within Genetic Algorithms for Power Optimization
This paper proposes an optimization algorithm for reducing the power dissipation in a sequential circuit. The encoding of the different states in a Finite State Machine is modifie...
S. Chuisano, Fulvio Corno, Paolo Prinetto, Maurizi...
DAC
1999
ACM
14 years 11 months ago
A Low Power Hardware/Software Partitioning Approach for Core-Based Embedded Systems
We present a novel approach that minimizes the power consumption of embedded core-based systems through hardware/software partitioning. Our approach is based on the idea of mapping...
Jörg Henkel
ICCAD
2003
IEEE
123views Hardware» more  ICCAD 2003»
14 years 7 months ago
Full-Chip Interconnect Power Estimation and Simulation Considering Concurrent Repeater and Flip-Flop Insertion
In this paper, we study the full-chp interconnect power modeling. ,We show that repeater,insertion is no longer sufficient to achievethe targetfrequencies specifiedhy ITRS, and de...
Weiping Liao, Lei He
PRDC
2007
IEEE
14 years 4 months ago
Power-Performance Trade-Off of a Dependable Multicore Processor
As deep submicron technologies are advanced, new challenges, such as power consumption and soft errors, are emerging. A naïve technique, which utilizes emerging multicore process...
Toshinori Sato, Toshimasa Funaki
ICMCS
2006
IEEE
98views Multimedia» more  ICMCS 2006»
14 years 4 months ago
Unequal Iterative Decoding for Power Efficient Video Transmission
We present an unequal iterative decoding (UID) approach for minimization of the receiver power consumption subject to a given quality of service, by exploiting data partitioning a...
Yongfang Wang, Songyu Yu, Xiaokang Yang