23 search results - page 3 / 5 » The Role of Long and Short Paths in Circuit Performance Opti... |
GLVLSI
2010
IEEE
14 years 17 days ago
2010
IEEE
Processors have traditionally been designed for the worst-case, resulting in designs that have high yields, but are expensive in terms of area and power. Better-than-worst-case (B...
ISLPED
2009
ACM
14 years 2 months ago
2009
ACM
On-chip communication, including short, often-multicast, latency-critical coherence and synchronization messages, and long, unicast, throughput-sensitive data transfer, limits the...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
TCAD
2008
13 years 7 months ago
2008
Abstract--In this paper, we propose track routing and optimization for yield (TROY), the first track router for the optimization of yield loss due to random defects. As the probabi...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...