48 search results - page 7 / 10 » The Validity of Retiming Sequential Circuits |
DATE
1997
IEEE
13 years 11 months ago
1997
IEEE
A new method for state justi cation is proposed for sequential circuit test generation. The linear list of states dynamically obtained during the derivation of test vectors is use...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
- This paper performs analysis and design of latches and flip-flops while considering the effect of event upsets caused by energetic particle hits. First it is shown that the conve...
ICCD
2001
IEEE
14 years 4 months ago
2001
IEEE
We present a simulation-based semi-formal verification method for sequential circuits described at the registertransfer level. The method consists of an iterative loop where cove...
FCCM
2009
IEEE
14 years 2 months ago
2009
IEEE
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
Power gating is emerging as a viable solution to reduction of leakage current. However, power gated circuits are different from the conventional designs in the sense that a power-...