Sciweavers

34 search results - page 4 / 7
» The YAGS Branch Prediction Scheme
Sort
View
ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
13 years 11 months ago
Alternative Implementations of Two-Level Adaptive Branch Prediction
As the issue rate and depth of pipelining of high performance Superscalar processors increase, the importance of an excellent branch predictor becomes more vital to delivering the...
Tse-Yu Yeh, Yale N. Patt
ISCA
1997
IEEE
119views Hardware» more  ISCA 1997»
13 years 11 months ago
The Agree Predictor: A Mechanism for Reducing Negative Branch History Interference
Deeply pipelined, superscalar processors require accurate branch prediction to achieve high performance. Two-level branch predictors have been shown to achieve high prediction acc...
Eric Sprangle, Robert S. Chappell, Mitch Alsup, Ya...
CNHPCA
2009
Springer
13 years 10 months ago
Parallel Branch Prediction on GPU Platform
Abstract. Branch Prediction is a common function in nowadays microprocessor. Branch predictor is duplicated into multiple copies in each core of a multicore and many-core processor...
Liqiang He, Guangyong Zhang
ICCD
2002
IEEE
93views Hardware» more  ICCD 2002»
14 years 4 months ago
Speculative Trace Scheduling in VLIW Processors
VLIW processors are statically scheduled processors and their performance depends on the quality of the compiler’s scheduler. We propose a scheduling scheme where the applicatio...
Manvi Agarwal, S. K. Nandy, Jos T. J. van Eijndhov...
ISCA
1997
IEEE
98views Hardware» more  ISCA 1997»
13 years 11 months ago
Target Prediction for Indirect Jumps
As the issue rate and pipeline depth of high performance superscalar processors increase, the amount of speculative work issued also increases. Because speculative work must be th...
Po-Yung Chang, Eric Hao, Yale N. Patt