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FPGA
2000
ACM
120views FPGA» more  FPGA 2000»
13 years 11 months ago
A novel high throughput reconfigurable FPGA architecture
With increased logic density due to the shift towards Deep Submicron technologies (DSM), FPGAs have become a viable option for implementing large designs. However, most commercial...
Amit Singh, Luca Macchiarulo, Arindam Mukherjee, M...
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
14 years 19 days ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
GLVLSI
2008
IEEE
197views VLSI» more  GLVLSI 2008»
13 years 7 months ago
Efficient tree topology for FPGA interconnect network
This paper presents an improved Tree-based architecture that unifies two unidirectional programmable networks: A predictible downward network based on the Butterfly-FatTree topolo...
Zied Marrakchi, Hayder Mrabet, Emna Amouri, Habib ...
FPL
2010
Springer
168views Hardware» more  FPL 2010»
13 years 5 months ago
Pipelined FPGA Adders
Integer addition is a universal building block, and applications such as quad-precision floating-point or elliptic curve cryptography now demand precisions well beyond 64 bits. Thi...
Florent de Dinechin, Hong Diep Nguyen, Bogdan Pasc...