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» The associative-skew clock routing problem
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ICCAD
2003
IEEE
154views Hardware» more  ICCAD 2003»
14 years 4 months ago
Length-Matching Routing for High-Speed Printed Circuit Boards
As the clock frequencies used in industrial applications increase, the timing requirements imposed on routing problems become tighter. So, it becomes important to route the nets w...
Muhammet Mustafa Ozdal, Martin D. F. Wong
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 4 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
ICCD
2004
IEEE
76views Hardware» more  ICCD 2004»
14 years 4 months ago
Technique to Eliminate Sorting in IP Packet Forwarding Devices
This paper will present a solution to eliminate the requirements of sorting by prefix length in IP forwarding devices using Ternary Content Addressable Memories (TCAMs). This will...
Raymond W. Baldwin, Enrico Ng
ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
14 years 4 months ago
A Two-Layer Bus Routing Algorithm for High-Speed Boards
The increasing clock frequencies in high-end industrial circuits bring new routing challenges that can not be handled by traditional algorithms. An important design automation pro...
Muhammet Mustafa Ozdal, Martin D. F. Wong
DAC
2002
ACM
14 years 8 months ago
Towards global routing with RLC crosstalk constraints
Conventional global routing minimizes total wire length and congestion. Experiments using large industrial benchmark circuits show that up to 24% of nets in such routing solutions...
James D. Z. Ma, Lei He