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ICCAD
1993
IEEE
121views Hardware» more  ICCAD 1993»
13 years 11 months ago
Hierarchical extraction of 3D interconnect capacitances in large regular VLSI structures
For submicron integrated circuits, 3D numerical techniques are required to accurately compute the values of the interconnect capacitances. In this paper, we describe an hierarchic...
Arjan J. van Genderen, N. P. van der Meijs
DAC
1999
ACM
14 years 8 months ago
A Novel VLSI Layout Fabric for Deep Sub-Micron Applications
We propose a new VLSI layout methodology which addresses the main problems faced in Deep Sub-Micron (DSM) integrated circuit design. Our layout "fabric" scheme eliminate...
Sunil P. Khatri, Amit Mehrotra, Robert K. Brayton,...
DATE
2007
IEEE
110views Hardware» more  DATE 2007»
14 years 1 months ago
Nonlinearity analysis of Analog/RF circuits using combined multisine and volterra analysis
Abstract— Modern integrated radio systems require highly linear analog/RF circuits. Two-tone simulations are commonly used to study a circuit’s nonlinear behavior. Very often, ...
Jonathan Borremans, Ludwig De Locht, Piet Wambacq,...
3DIC
2009
IEEE
184views Hardware» more  3DIC 2009»
14 years 2 months ago
Architectural evaluation of 3D stacked RRAM caches
The first memristor, originally theorized by Dr. Leon Chua in 1971, was identified by a team at HP Labs in 2008. This new fundamental circuit element is unique in that its resis...
Dean L. Lewis, HsienHsin S. Lee
ICCAD
2008
IEEE
107views Hardware» more  ICCAD 2008»
14 years 2 months ago
Importance sampled circuit learning ensembles for robust analog IC design
This paper presents ISCLEs, a novel and robust analog design method that promises to scale with Moore’s Law, by doing boosting-style importance sampling on digital-sized circuit...
Peng Gao, Trent McConaghy, Georges G. E. Gielen