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IPPS
2007
IEEE
14 years 3 months ago
Optimizing the Fast Fourier Transform on a Multi-core Architecture
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
Long Chen, Ziang Hu, Junmin Lin, Guang R. Gao
ISCAS
2007
IEEE
180views Hardware» more  ISCAS 2007»
14 years 3 months ago
Characterization of a Fault-tolerant NoC Router
— With increasing reliability concerns for current and next generation VLSI technologies, fault-tolerance is fast becoming an integral part of system-on-chip (SoC) and multicore ...
Sumit D. Mediratta, Jeffrey T. Draper
MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
14 years 3 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
MICRO
2007
IEEE
167views Hardware» more  MICRO 2007»
14 years 3 months ago
Informed Microarchitecture Design Space Exploration Using Workload Dynamics
Program runtime characteristics exhibit significant variation. As microprocessor architectures become more complex, their efficiency depends on the capability of adapting with wor...
Chang-Burm Cho, Wangyuan Zhang, Tao Li
VTC
2007
IEEE
14 years 3 months ago
Performance Modelling and Analysis of the Sleep-Mode in IEEE802.16e WMAN
In this study, we analyze the sleep-mode operation for power management of a mobile station in the IEEE802.16e Wireless Metropolitan Access Network. For the analysis we use the M/...
Yunju Park, Gang Uk Hwang