9 search results - page 2 / 2 » The design of a 64-bit integer multiplier divider unit |
ARITH
2003
IEEE
14 years 23 days ago
2003
IEEE
This work uses a partially redundant number system as an internal format for floating point arithmetic operations. The redundant number system enables carry free arithmetic opera...
LCTRTS
2001
Springer
13 years 12 months ago
2001
Springer
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
ARITH
2009
IEEE
14 years 2 months ago
2009
IEEE
Hardware implementation of all the basic radix-10 arithmetic operations is evolving as a new trend in the design and implementation of general purpose digital processors. Redundan...
ISCA
2000
IEEE
13 years 12 months ago
2000
IEEE
Our program benchmarks and simulations of novel circuits indicate that large-window processors are feasible. Using our redesigned superscalar components, a large-window processor ...