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ASPDAC
2009
ACM
153views Hardware» more  ASPDAC 2009»
13 years 6 months ago
A 3D prototyping chip based on a wafer-level stacking technology
We have developed a new 3-dimensional stacking technology using wafer-to-wafer stacked method and evaluated the connectivity between TSV and micro-bump. The prototype 3-layer stac...
Nobuaki Miyakawa
CSCL
2008
106views more  CSCL 2008»
13 years 9 months ago
Operationalizing macro-scripts in CSCL technological settings
: This paper presents a conceptual analysis of the technological dimensions related to the operationalization of CSCL macro-scripts. CSCL scripts are activity models that aim at en...
Pierre Tchounikine
ICALT
2008
IEEE
14 years 3 months ago
Learning Technology Standards Adoption How to Improve Process and Product Legitimacy
Standardisation of learning technologies as a coordinated design activity needs legitimacy to attract the necessary support from its stakeholders. This paper identifies the need f...
Tore Hoel, Paul A. Hollins
FPL
2009
Springer
162views Hardware» more  FPL 2009»
14 years 1 months ago
A comparison of FPGA and FPAA technologies for a signal processing application
This paper presents a comparison between two technologies for reconfigurable circuits that are FPGA'se the FPAA's. The comparison is based on a case study of the area of...
Roberto Selow, Heitor S. Lopes, Carlos R. Erig Lim...
ICCAD
1998
IEEE
90views Hardware» more  ICCAD 1998»
14 years 1 months ago
Technology mapping for domino logic
Domino logic is a popular con guration for implementing high-speed circuits. An algorithm for domino logic mapping, under a parameterized library style, is presented here. Practic...
Min Zhao, Sachin S. Sapatnekar