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FPGA
1995
ACM
110views FPGA» more  FPGA 1995»
14 years 3 days ago
Testing of Uncustomized Segmented Channel Field Programmable Gate Arrays
This paper presents a methodology for production-time testing of (uncustomized) segmented channel eld programmable gate arrays (FPGAs) such as those manufactured by Actel [1]. Th...
Tong Liu, Wei-Kang Huang, Fabrizio Lombardi
DSD
2007
IEEE
160views Hardware» more  DSD 2007»
14 years 2 months ago
Alternatives in Designing Level-Restoring Buffers for Interconnection Networks in Field-Programmable Gate Arrays
Programmable routing and logic in field-programmable gate arrays are implemented using nMOS pass transistors. Since the threshold voltage drop across an nMOS device degrades the ...
Scott Miller, Mihai Sima, Michael McGuire
FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
14 years 2 months ago
A Field Programmable RFID Tag and Associated Design Flow
Current Radio Frequency Identification (RFID) systems generally have long design times and low tolerance to changes in specification. This paper describes a field programmable,...
Alex K. Jones, Raymond R. Hoare, Swapna R. Donthar...
VLSISP
2008
108views more  VLSISP 2008»
13 years 8 months ago
Interconnect Driver Design for Long Wires in Field-Programmable Gate Arrays
Each new semiconductor technology node brings smaller, faster transistors and smaller, slower wires. In particular, long interconnect wires in modern FPGAs now require rebuffering ...
Edmund Lee, Guy Lemieux, Shahriar Mirabbasi
BMCBI
2007
233views more  BMCBI 2007»
13 years 8 months ago
160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)
Background: To infer homology and subsequently gene function, the Smith-Waterman (SW) algorithm is used to find the optimal local alignment between two sequences. When searching s...
Isaac T. S. Li, Warren Shum, Kevin Truong