In this paper, a new type of Petri net called Hierarchical Colored Hardware Petri net, to model real-delay switching activity for power estimation is proposed. The logic circuit i...
Consideration of pairs of transition in probabilistic simulation allows power estimation for digital circuits in which inertial delays can filter glitches [5]. However, the merit ...
—With the continued push toward dispersed generation and distributed intelligent devices throughout the distribution system, a proper analysis method for understanding the operat...
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
—We propose to use power pins to simultaneously carry data signals while delivering its power. A direct superposition of a data signal on a power pin would fail due to an inheren...