50 search results - page 7 / 10 » Thermal modeling and analysis of 3D multi-processor chips |
ISCAS
2006
IEEE
2006
IEEE
Microelectromechanical systems in 3D SOI-CMOS: sensing electronics embedded in mechanical structures
14 years 1 months ago
— We discuss the design of CMOS MEMS in a 3D SOI-CMOS technology. We present layout architectures, preliminary mechanics modeling using finite element analysis and release proce...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
This paper presents a novel technique for the modeling, simulation, and analysis of real-time applications on MultiProcessor Systems-on-Chip (MPSoCs). This technique is based on a...
ISCA
2008
IEEE
14 years 1 months ago
2008
IEEE
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
MR
2002
13 years 7 months ago
2002
In the flip-chip assembly process, no-flow underfill materials have a particular advantage over traditional underfill: the application and curing of the former can be undertaken b...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Ever-increasing integrated circuit (IC) power densities and peak temperatures threaten reliability, performance, and economical cooling. To address these challenges, thermal analy...