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DAC
2005
ACM
14 years 11 months ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
IEEEPACT
2009
IEEE
14 years 4 months ago
Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning
—Performance degradation of memory-intensive programs caused by the LRU policy’s inability to handle weaklocality data accesses in the last level cache is increasingly serious ...
Qingda Lu, Jiang Lin, Xiaoning Ding, Zhao Zhang, X...
ISCAS
2007
IEEE
161views Hardware» more  ISCAS 2007»
14 years 4 months ago
Hardware Architecture of a Parallel Pattern Matching Engine
Abstract— Several network security and QoS applications require detecting multiple string matches in the packet payload by comparing it against predefined pattern set. This proc...
Meeta Yadav, Ashwini Venkatachaliah, Paul D. Franz...
ACRI
2004
Springer
14 years 3 months ago
Optimizing the Behavior of a Moving Creature in Software and in Hardware
We have investigated a problem where the goal is to find automatically the best rule for a cell in the cellular automata model. The cells are either of type OBSTACLE, EMPTY or CRE...
Mathias Halbach, Wolfgang Heenes, Rolf Hoffmann, J...
DATE
2010
IEEE
107views Hardware» more  DATE 2010»
14 years 3 months ago
An error-correcting unordered code and hardware support for robust asynchronous global communication
A new delay-insensitive data encoding scheme for global asynchronous communication is introduced. The goal of this work is to combine the timing-robustness of delay-insensitive (i....
Melinda Y. Agyekum, Steven M. Nowick