6111 search results - page 165 / 1223 » Time, Hardware, and Uniformity |
DATE
2003
IEEE
14 years 3 months ago
2003
IEEE
A new computational concept of timing jitter is proposed that is suitable for exploitation in circuit simulators. It is based on the approximation of computed noise characteristic...
ICCAD
2000
IEEE
14 years 2 months ago
2000
IEEE
This paper addresses the issue of timing driven gate duplication for delay optimization. Gate duplication has been used extensively for cutset minimization but the usefulness in m...
ICCAD
1994
IEEE
14 years 2 months ago
1994
IEEE
For a logic design with level-sensitive latches, we need to validate timing signal paths which may flush through several latches. We developed efficient algorithms based on the mo...
ASPDAC
2004
ACM
14 years 2 months ago
2004
ACM
When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
‡ Physical and generic models that analytically couple the array architecture of CMOS SRAMs with the wire lengths and fan-outs along critical paths to decode and sense data are r...