Sciweavers

6111 search results - page 194 / 1223
» Time, Hardware, and Uniformity
Sort
View
DATE
2003
IEEE
90views Hardware» more  DATE 2003»
14 years 4 months ago
Transistor-Level Static Timing Analysis by Piecewise Quadratic Waveform Matching
While fast timing analysis methods, such as asymptotic waveform evaluation (AWE), have been well established for linear circuits, the timing analysis for non-linear circuits, whic...
Zhong Wang, Jianwen Zhu
DATE
2002
IEEE
102views Hardware» more  DATE 2002»
14 years 3 months ago
Library Compatible Ceff for Gate-Level Timing
Accurate gate-level static timing analysis in the presence of RC loads has become an important problem for modern deep-submicron designs. Non-capacitive loads are usually analyzed...
Bernard N. Sheehan
ICCAD
1998
IEEE
83views Hardware» more  ICCAD 1998»
14 years 2 months ago
Lazy transition systems: application to timing optimization of asynchronous circuits
This paper introduces Lazy Transitions Systems (LzTSs). The notion of laziness explicitly distinguishes between the enabling and the firing of an event in a transition system. LzT...
Jordi Cortadella, Michael Kishinevsky, Alex Kondra...
ASPDAC
2008
ACM
169views Hardware» more  ASPDAC 2008»
14 years 23 days ago
Analytical model for the impact of multiple input switching noise on timing
The timing models used in current Static Timing Analysis tools use gate delays only for single input switching events. It is well known that the temporal proximity of signals arriv...
Rajeshwary Tayade, Sani R. Nassif, Jacob A. Abraha...
ASPDAC
2010
ACM
151views Hardware» more  ASPDAC 2010»
13 years 8 months ago
Source-level timing annotation for fast and accurate TLM computation model generation
This paper proposes a source-level timing annotation method for generation of accurate transaction level models for software computation modules. While Transaction Level Modeling ...
Kai-Li Lin, Chen Kang Lo, Ren-Song Tsay