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» Time, Hardware, and Uniformity
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ASYNC
2007
IEEE
132views Hardware» more  ASYNC 2007»
14 years 5 months ago
Area Optimizations for Dual-Rail Circuits Using Relative-Timing Analysis
Future deep sub-micron technologies will be characterized by large parametric variations, which could make asynchronous design an attractive solution for use on large scale. Howev...
Tiberiu Chelcea, Girish Venkataramani, Seth Copen ...
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
14 years 5 months ago
Use of statistical timing analysis on real designs
A vast literature has been published on Statistical Static Timing Analysis (SSTA), its motivations, its different implementations and their runtime/accuracy trade-offs. However, v...
A. Nardi, Emre Tuncer, S. Naidu, A. Antonau, S. Gr...
FPL
2007
Springer
126views Hardware» more  FPL 2007»
14 years 5 months ago
A Time-Triggered Network-on-Chip
In this paper we propose a time-triggered network-onchip (NoC) for on-chip real-time systems. The NoC provides time predictable on- and off-chip communication, a mandatory feature...
Martin Schoeberl
DATE
2005
IEEE
152views Hardware» more  DATE 2005»
14 years 4 months ago
Modeling and Propagation of Noisy Waveforms in Static Timing Analysis
A technique based on the sensitivity of the output to input waveform is presented for accurate propagation of delay information through a gate for the purpose of static timing ana...
Shahin Nazarian, Massoud Pedram, Emre Tuncer, Tao ...
DATE
2003
IEEE
86views Hardware» more  DATE 2003»
14 years 4 months ago
Improved Time Domain Simulation of Optical Multimode Intrasystem Interconnects
To increase the bandwidth of high-performance intrasystem interconnections optical multimode waveguides can be used. Since the design procedure of optical interconnections has to ...
Jens Gerling, Oliver Stübbe, Jürgen Schr...