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» Timed Circuit Synthesis Using Implicit Methods
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DAC
2006
ACM
14 years 1 months ago
Clock buffer and wire sizing using sequential programming
This paper investigates methods for clock skew minimization using buffer and wire sizing. First, a technique that significantly improves solution quality and stability of sequent...
Matthew R. Guthaus, Dennis Sylvester, Richard B. B...
DATE
2007
IEEE
138views Hardware» more  DATE 2007»
14 years 2 months ago
An ADC-BiST scheme using sequential code analysis
This paper presents a built-in self-test (BiST) scheme for analog to digital converters (ADC) based on a linear ramp generator and efficient output analysis. The proposed analysi...
Erdem Serkan Erdogan, Sule Ozev
ENTCS
2008
110views more  ENTCS 2008»
13 years 7 months ago
Performance Evaluation of Elastic GALS Interfaces and Network Fabric
This paper reports on the design of a test chip built to test a) a new latency insensitive network fabric protocol and circuits, b) a new synchronizer design, and c) how efficient...
JunBok You, Yang Xu, Hosuk Han, Kenneth S. Stevens
TASLP
2010
99views more  TASLP 2010»
13 years 6 months ago
A Virtual Model of Spring Reverberation
—The digital emulation of analog audio effects and synthesis components, through the simulation of lumped circuit components has seen a large amount of activity in recent years; ...
Stefan Bilbao, Julian Parker
SCALESPACE
2009
Springer
14 years 8 days ago
From a Single Point to a Surface Patch by Growing Minimal Paths
Abstract. We introduce a novel implicit approach for surface patch segmentation in 3D images starting from a single point. Since the boundary surface of an object is locally homeom...
Fethallah Benmansour, Laurent D. Cohen