769 search results - page 53 / 154 » Timed Circuit Synthesis Using Implicit Methods |
ICCAD
1997
IEEE
14 years 1 months ago
1997
IEEE
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
ICCAD
2001
IEEE
14 years 7 months ago
2001
IEEE
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
VLSID
2005
IEEE
14 years 10 months ago
2005
IEEE
Synchronous design methods have intrinsic performance overheads due to their use of the global clock and timing assumptions. In future manufacturing processes not only may it beco...
SAT
2007
Springer
14 years 4 months ago
2007
Springer
SAT solvers are often challenged with very hard problems that remain unsolved after hours of CPU time. The research community meets the challenge in two ways: (1) by improving the ...
DATE
1999
IEEE
14 years 2 months ago
1999
IEEE
Test application time is an important factor in the overall cost of VLSI chip testing. We present a new ATPG approach for generating compact test sequences for sequential circuits...