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» Timed Circuit Synthesis Using Implicit Methods
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ISPD
2009
ACM
112views Hardware» more  ISPD 2009»
14 years 5 months ago
Post-floorplanning power/ground ring synthesis for multiple-supply-voltage designs
The multiple-supply voltage (MSV) design style has been extensively applied to mitigate dynamic-power consumption. The MSV design paradigm, however, brings many crucial challenges...
Wan-Ping Lee, Diana Marculescu, Yao-Wen Chang
DATE
1998
IEEE
92views Hardware» more  DATE 1998»
14 years 2 months ago
Multiple Behavior Module Synthesis Based on Selective Groupings
In this paper, we present an approach to synthesize multiple behavior modules. Given n DFGs to be implemented, the previous methods scheduled each of them sequentially, and implem...
Ju Hwan Yi, Hoon Choi, In-Cheol Park, Seung Ho Hwa...
DATE
1997
IEEE
70views Hardware» more  DATE 1997»
14 years 2 months ago
Fast power loss calculation for digital static CMOS circuits
: In this paper, we present a new dynamic power estimation method that produces accurate power measures at considerably faster run times. The approach uses an enhanced switch-level...
Sergey Gavrilov, Alexey Glebov, S. Rusakov, David ...
ITC
1996
IEEE
96views Hardware» more  ITC 1996»
14 years 2 months ago
Analysis and Detection of Timing Failures in an Experimental Test Chip
A 25k gate Test Chip was designed and manufactured to evaluate different test methods for scan-designed circuits. The design of the chip, the experiment, and preliminary experimen...
Piero Franco, Siyad C. Ma, Jonathan Chang, Yi-Chin...
INTEGRATION
2006
82views more  INTEGRATION 2006»
13 years 10 months ago
On whitespace and stability in physical synthesis
In the context of physical synthesis, large-scale standard-cell placement algorithms must facilitate incremental changes to layout, both local and global. In particular, flexible ...
Saurabh N. Adya, Igor L. Markov, Paul G. Villarrub...