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» Timed Verification of Asynchronous Circuits
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ICCAD
2003
IEEE
195views Hardware» more  ICCAD 2003»
14 years 28 days ago
Vectorless Analysis of Supply Noise Induced Delay Variation
The impact of power supply integrity on a design has become a critical issue, not only for functional verification, but also for performance verification. Traditional analysis has...
Sanjay Pant, David Blaauw, Vladimir Zolotov, Savit...
DAC
2003
ACM
14 years 8 months ago
Temporofunctional crosstalk noise analysis
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. This paper proposes a method of characterizing correlation of signal tra...
Donald Chai, Alex Kondratyev, Yajun Ran, Kenneth H...
VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
14 years 8 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
ASIACRYPT
2009
Springer
14 years 2 months ago
Secure Multi-party Computation Minimizing Online Rounds
Multi-party secure computations are general important procedures to compute any function while keeping the security of private inputs. In this work we ask whether preprocessing can...
Seung Geol Choi, Ariel Elbaz, Tal Malkin, Moti Yun...
ICCAD
2006
IEEE
125views Hardware» more  ICCAD 2006»
14 years 4 months ago
Leveraging protocol knowledge in slack matching
Stalls, due to mis-matches in communication rates, are a major performance obstacle in pipelined circuits. If the rate of data production is faster than the rate of consumption, t...
Girish Venkataramani, Seth Copen Goldstein