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DATE
2002
IEEE
154views Hardware» more  DATE 2002»
14 years 18 days ago
Low Power Error Resilient Encoding for On-Chip Data Buses
As technology scales toward deep submicron, on-chip interconnects are becoming more and more sensitive to noise sources such as power supply noise, crosstalk, radiation induced ef...
Davide Bertozzi, Luca Benini, Giovanni De Micheli
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
14 years 17 days ago
Security-Driven Exploration of Cryptography in DSP Cores
With the popularity of wireless communication devices a new important dimension of embedded systems design has arisen, that of security. This paper presents for the first time des...
Catherine H. Gebotys
WACV
2002
IEEE
14 years 16 days ago
Viewing Enhancement in Video-Endoscopy
Video-endoscopy (Figure 1), a mode of minimally invasive surgery, has proven to be significantly less invasive to the patient. However, it creates a much more complex operation env...
Dan Koppel, Yuan-Fang Wang, Hua Lee
ISLPED
1999
ACM
150views Hardware» more  ISLPED 1999»
13 years 12 months ago
Using dynamic cache management techniques to reduce energy in a high-performance processor
In this paper, we propose a technique that uses an additional mini cache, the L0-Cache, located between the instruction cache I-Cache and the CPU core. This mechanism can provid...
Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. P...
INFOVIS
1999
IEEE
13 years 12 months ago
Visualizing Application Behavior on Superscalar Processors
The advent of superscalar processors with out-of-order execution makes it increasingly difficult to determine how well an application is utilizing the processor and how to adapt t...
Chris Stolte, Robert Bosch, Pat Hanrahan, Mendel R...