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» Timing analysis in high-level synthesis
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ASPDAC
2006
ACM
726views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Newton: a library-based analytical synthesis tool for RF-MEMS resonators
Newton is a library-based CAD tool with an analytical synthesis engine which has been developed to support the direct synthesis of the physical design and an electromechanically eq...
Michael S. McCorquodale, James L. McCann, Richard ...
DATE
2005
IEEE
124views Hardware» more  DATE 2005»
14 years 1 months ago
Multi-Placement Structures for Fast and Optimized Placement in Analog Circuit Synthesis
This paper presents the novel idea of multi-placement structures, for a fast and optimized placement instantiation in analog circuit synthesis. These structures need to be generat...
Raoul F. Badaoui, Ranga Vemuri
ISSS
2002
IEEE
133views Hardware» more  ISSS 2002»
14 years 19 days ago
Efficient Simulation of Synthesis-Oriented System Level Designs
Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware system...
Rajesh K. Gupta, Sandeep K. Shukla, Nick Savoiu
ICCAD
2005
IEEE
168views Hardware» more  ICCAD 2005»
14 years 4 months ago
Statistical timing analysis driven post-silicon-tunable clock-tree synthesis
— Process variations cause significant timing uncertainty and yield degradation in deep sub-micron technologies. A solution to counter timing uncertainty is post-silicon clock t...
Jeng-Liang Tsai, Lizheng Zhang
FSEN
2009
Springer
13 years 11 months ago
Verification, Performance Analysis and Controller Synthesis for Real-Time Systems
This note aims at providing a concise and precise Travellers Guide, Phrase Book or Reference Manual to the timed automata modeling formalism introduced by Alur and Dill [7, 8]. The...
Uli Fahrenberg, Kim G. Larsen, Claus R. Thrane