290 search results - page 44 / 58 » Timing analysis in high-level synthesis |
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
DATE
2002
IEEE
14 years 20 days ago
2002
IEEE
Advancing technology drives design technology and thus design automation EDA . How to model interconnect, how to handle degradation of signal integrity and increasing power densi...
JAR
2006
13 years 7 months ago
2006
We use some recent techniques from process algebra to draw several conclusions about the well studied class of ping-pong protocols introduced by Dolev and Yao. In particular we sho...
PPDP
2010
Springer
13 years 6 months ago
2010
Springer
This paperdescribes the use of a powerful graph query language for querying programs, and a novel combination of transformations for generating efficient implementations of the q...