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FPGA
2007
ACM
153views FPGA» more  FPGA 2007»
14 years 2 months ago
GlitchLess: an active glitch minimization technique for FPGAs
This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
ICRA
2006
IEEE
158views Robotics» more  ICRA 2006»
14 years 2 months ago
An Agent-based Mobile Robot System using Configurable SOC Technique
– To make a mobile robot with real-time vision system adapt to the highly dynamic environments and emergencies under the real-time constraints, a significant account of processin...
Yan Meng
DATE
2010
IEEE
183views Hardware» more  DATE 2010»
14 years 1 months ago
Monolithically stackable hybrid FPGA
— The paper introduces novel field programmable gate array (FPGA) circuits based on hybrid CMOS/resistive switching device (memristor) technology and explores several logic archi...
Dmitri Strukov, Alan Mishchenko
AFRIGRAPH
2004
ACM
14 years 2 months ago
Realistic shading of human skin in real time
The demand for realistic human characters is driven by interactive application developers worldwide. The look of 3D models in real time graphics is efficiently improved by powerfu...
Florian Struck, Christian-A. Bohn, Sebastian Schmi...
DAC
2005
ACM
14 years 9 months ago
Power-aware placement
Lowering power is one of the greatest challenges facing the IC industry today. We present a power-aware placement method that simultaneously performs (1) activity-based register c...
Yongseok Cheon, Pei-Hsin Ho, Andrew B. Kahng, Sher...