188 search results - page 18 / 38 » Timing-driven optimization using lookahead logic circuits |
ICCAD
2005
IEEE
14 years 7 months ago
2005
IEEE
Separate optimizations of logic and layout have been thoroughly studied in the past and are well documented for common benchmarks. However, to be competitive, modern circuit optim...
EH
2004
IEEE
14 years 1 months ago
2004
IEEE
Field programmable gate arrays (FPGAs) are becoming increasingly important implementation platforms for digital circuits. One of the necessary requirements to effectively utilize ...
CEC
2003
IEEE
14 years 3 months ago
2003
IEEE
In this paper, the use of Simulated Evolution (SimE) Algorithm in the design of digital logic circuits is proposed. SimE algorithm consists of three steps: evaluation, selection an...
VLSID
2007
IEEE
14 years 10 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
DSD
2004
IEEE
14 years 1 months ago
2004
IEEE
In this paper, we present a full-static carry-skip adder designed to achieve low power dissipation and high-performance operation. To reduce the adder's delay and power consu...