Sciweavers

134 search results - page 21 / 27
» Tolerance Models in Hardware Description Languages
Sort
View
ICCAD
2003
IEEE
198views Hardware» more  ICCAD 2003»
14 years 4 months ago
A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
Santanu Mahapatra, Kaustav Banerjee, Florent Pegeo...
DATE
1999
IEEE
95views Hardware» more  DATE 1999»
13 years 11 months ago
Object-Oriented Reuse Methodology for VHDL
In the reuse domain, the necessity of finding a new, more suitable description language opposes the need to make reuse an accepted practice, and thus related to standards. This pa...
Cristina Barna, Wolfgang Rosenstiel
ATAL
1995
Springer
13 years 11 months ago
The Architecture of an Agent Building Shell
The agent view provides maybe the right level of abstraction for dealing with complex, distribblem-solving systems. It abstracts from aspects like the hardware or software platfor...
Mihai Barbuceanu, Mark S. Fox
MICRO
2002
IEEE
100views Hardware» more  MICRO 2002»
14 years 12 days ago
Microarchitectural exploration with Liberty
To find the best designs, architects must rapidly simulate many design alternatives and have confidence in the results. Unfortunately, the most prevalent simulator construction ...
Manish Vachharajani, Neil Vachharajani, David A. P...
ISMVL
2007
IEEE
104views Hardware» more  ISMVL 2007»
14 years 1 months ago
Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL
Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such syst...
Mahsan Amoui, Daniel Große, Mitchell A. Thor...