Recent advances in large-capacity, low-cost storage devices have led to active research in design of large-scale storage systems built from commodity devices for supercomputing ap...
Qin Xin, Ethan L. Miller, Thomas J. E. Schwarz, Da...
In this paper we introduce INSEE, an environment to help in the design of interconnection networks for parallel computing systems. It contains two basic modules: a system to genera...
As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...
The number of cores present on-chip is increasing rapidly. The on-chip network that connects these cores needs to scale efficiently. The topology of on-chip networks is an importan...
As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...