— In order to achieve timing closure on increasingly complex IC designs, buffer insertion needs to be performed on thousands of nets within an integrated physical synthesis syste...
Charles J. Alpert, Gopal Gandham, Milos Hrkic, Jia...
Different logic synthesis tasks have been formulated as input encoding problems but restricted to use a minimum number of binary variables. This paper presents an original column ...
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
In this paper a constructive library-aware multilevel logic synthesis approach using symmetries is described. It integrates the technology-independent and technologydependent stag...
Combinational circuits are generally thought of as acyclic structures. It is known that cyclic structures can be combinational, and techniques have been proposed to analyze cyclic...