Sciweavers

62 search results - page 9 / 13
» Total synthesis of algorithmic chemistries
Sort
View
ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Register binding and port assignment for multiplexer optimization
- Data path connection elements, such as multiplexers, consume a significant amount of area on a VLSI chip, especially for FPGA designs. Multiplexer optimization is a difficult pro...
Deming Chen, Jason Cong
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
14 years 2 months ago
Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
ISQED
2006
IEEE
109views Hardware» more  ISQED 2006»
14 years 2 months ago
Dual-K Versus Dual-T Technique for Gate Leakage Reduction : A Comparative Perspective
As a result of aggressive technology scaling, gate leakage (gate oxide direct tunneling) has become a major component of total power dissipation. Use of dielectrics of higher perm...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
TIP
2010
166views more  TIP 2010»
13 years 2 months ago
Restoration of Poissonian Images Using Alternating Direction Optimization
Much research has been devoted to the problem of restoring Poissonian images, namely for medical and astronomical applications. However, the restoration of these images using state...
Mário A. T. Figueiredo, José M. Biou...
ISQED
2010
IEEE
227views Hardware» more  ISQED 2010»
14 years 2 months ago
Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks
Leakage power has grown significantly and is a major challenge in SoC design. Among SoC's components, clock distribution network power accounts for a large portion of chip po...
Houman Homayoun, Shahin Golshan, Eli Bozorgzadeh, ...