18 search results - page 3 / 4 » Toward an Integrated Design Methodology for Fault-Tolerant, ... |
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—Partial Reconfiguration (PR) of FPGAs presents many opportunities for application design flexibility, enabling tasks to dynamically swap in and out of the FPGA without entire sy...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
DFT
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper presents theoretical yet practical methodologies to model, assure and optimize the Reliability of Clockless Wave Pipeline. Clockless wave pipeline is a cutting-edge and...
ICCAD
1999
IEEE
14 years 1 hour ago
1999
IEEE
Design systems to provide various quality of service (QoS) guarantees has received a lot of attentions due to the increasing popularity of real-time multimedia and wireless commun...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
In this paper, a novel automatic approach for the concurrent topology and routing optimization that achieves a high quality network layout is proposed. This optimization is based ...