264 search results - page 6 / 53 » Transaction level modeling: an overview |
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—The complexity of the test infrastructure and test strategies in systems-on-chip approaches the complexity of the functional design space. This paper presents test design space ...
DATE
2005
IEEE
13 years 9 months ago
2005
IEEE
Transaction Level Modeling (TLM) approach is used to meet the simulation speed as well as cycle accuracy for large scale SoC performance analysis. We implemented a transaction-lev...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
This paper presents a tool for automatic synthesis of RTL interfaces for heterogeneous MPSoC from transaction level models (TLMs). The tool captures the communication parameters i...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
The increasing complexity of embedded systems pushes system designers to higher levels of abstraction. Transaction Level Modeling (TLM) has been proposed to model ation in systems...
CODES
2003
IEEE
14 years 19 days ago
2003
IEEE
the level of abstraction in system design promises to enable faster exploration of the design space at early stages. While scheduling decision for embedded software has great impa...