110 search results - page 3 / 22 » Two VLSI Design Advances in Arithmetic Coding |
GLVLSI
1999
IEEE
14 years 3 months ago
1999
IEEE
This paper describes the designs of a saturating adder, multiplier, single MAC unit, and dual MAC unit with one cycle latencies. The dual MAC unit can perform two saturating MAC o...
ISLPED
1999
ACM
14 years 3 months ago
1999
ACM
A recent trend in low power design has been the employment of reduced precision processing methods for decreasing arithmetic activity and average power dissipation. Such designs c...
ISCAS
2007
IEEE
14 years 5 months ago
2007
IEEE
—This paper presents a new context modeling technique for arithmetic coding of DCT coefficients in video compression. A key feature of the new technique is the inclusion of all p...
VLSID
2002
IEEE
14 years 11 months ago
2002
IEEE
An important class of problems used widely in both the embedded systems and scientific domains perform memory intensive computations on large data sets. These data sets get to be ...
VLSID
2006
IEEE
14 years 4 months ago
2006
IEEE
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...