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» Ultra low power digital signal processing
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ISCAS
2002
IEEE
149views Hardware» more  ISCAS 2002»
14 years 2 months ago
Design of a DSP-based 24 bit digital audio equalizer for automotive applications
The project deals with the design and realization of a dedicated board DSP-based for the processing of audio signals for automotive applications (DIGIcar). The I/O interface of th...
Alberto Bellini, Eraldo Carpanoni, Giacomo Frassi,...
DDECS
2009
IEEE
111views Hardware» more  DDECS 2009»
14 years 3 months ago
0.5V 160-MHz 260uW all digital phase-locked loop
– A low power all-digital phase locked-loop (ADPLL) in a 0.13um CMOS process is presented. The pulse-based digitally controlled oscillator (PB-DCO) performs a high resolution and...
Jen-Chieh Liu, Hong-Yi Huang, Wei-Bin Yang, Kuo-Hs...
CHES
1999
Springer
133views Cryptology» more  CHES 1999»
14 years 1 months ago
Random Number Generators Founded on Signal and Information Theory
The strength of a cryptographic function depends on the amount of entropy in the cryptovariables that are used as keys. Using a large key length with a strong algorithm is false co...
David Paul Maher, Robert J. Rance
DATE
2007
IEEE
125views Hardware» more  DATE 2007»
14 years 3 months ago
Simulation platform for UHF RFID
1 Developing modern integrated and embedded systems require well-designed processes to ensure flexibility and independency. These features are related to exchangeability of hardw...
Vojtech Derbek, Christian Steger, Reinhold Weiss, ...
DATE
2003
IEEE
115views Hardware» more  DATE 2003»
14 years 2 months ago
Embedded Software in Digital AM-FM Chipset
The new standard DRM for digital radio broadcast in AM band requires integrated devices for radio receivers at low cost and very low power consumption. A chipset is currently desi...
Michel Sarlotte, Bernard Candaele, J. Quevremont, ...