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» Understanding POWER multiprocessors
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ASPDAC
2007
ACM
101views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Core-Based Testing of Multiprocessor System-on-Chips Utilizing Hierarchical Functional Buses
Abstract--An integrated test scheduling methodology for multiprocessor System-on-Chips (SOC) utilizing the functional buses for test data delivery is described. The proposed method...
Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orail...
JSA
2008
116views more  JSA 2008»
13 years 7 months ago
Analyzing composability of applications on MPSoC platforms
Modern day applications require use of multi-processor systems for reasons of performance, scalability and power efficiency. As more and more applications are integrated in a sing...
Akash Kumar, Bart Mesman, Bart D. Theelen, Henk Co...
JTRES
2010
ACM
13 years 7 months ago
Cyclic executive for safety-critical Java on chip-multiprocessors
Chip-multiprocessors offer increased processing power at a low cost. However, in order to use them for real-time systems, tasks have to be scheduled efficiently and predictably. I...
Anders P. Ravn, Martin Schoeberl
ASPDAC
2010
ACM
168views Hardware» more  ASPDAC 2010»
13 years 5 months ago
Hybrid dynamic energy and thermal management in heterogeneous embedded multiprocessor SoCs
Heterogeneous multiprocessor system-on-chips (MPSoCs) which consist of cores with various power and performance characteristics can customize their configuration to achieve higher ...
Shervin Sharifi, Ayse Kivilcim Coskun, Tajana Simu...
HPCA
2006
IEEE
14 years 8 months ago
Dynamic power-performance adaptation of parallel computation on chip multiprocessors
Previous proposals for power-aware thread-level parallelism on chip multiprocessors (CMPs) mostly focus on multiprogrammed workloads. Nonetheless, parallel computation of a single...
Jian Li, José F. Martínez