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POPL
2005
ACM
14 years 8 months ago
Precise interprocedural analysis using random interpretation
We describe a unified framework for random interpretation that generalizes previous randomized intraprocedural analyses, and also extends naturally to efficient interprocedural an...
Sumit Gulwani, George C. Necula
SBCCI
2003
ACM
213views VLSI» more  SBCCI 2003»
14 years 29 days ago
Algorithms and Tools for Network on Chip Based System Design
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
Tang Lei, Shashi Kumar
ISPD
1999
ACM
89views Hardware» more  ISPD 1999»
14 years 1 days ago
VIA design rule consideration in multi-layer maze routing algorithms
—Maze routing algorithms are widely used for finding an optimal path in detailed routing for very large scale integration, printed circuit board and multichip modules In this pap...
Jason Cong, Jie Fang, Kei-Yong Khoo
JPDC
2006
111views more  JPDC 2006»
13 years 7 months ago
Designing irregular parallel algorithms with mutual exclusion and lock-free protocols
Irregular parallel algorithms pose a significant challenge for achieving high performance because of the difficulty predicting memory access patterns or execution paths. Within an...
Guojing Cong, David A. Bader
ISLPED
2004
ACM
123views Hardware» more  ISLPED 2004»
14 years 1 months ago
An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes
Increasing demand for larger high-performance applications requires developing more complex systems with hundreds of processing cores on a single chip. To allow dynamic voltage sc...
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou