139 search results - page 17 / 28 » Using dynamic domino circuits in self-timed systems |
CODES
2007
IEEE
14 years 2 months ago
2007
IEEE
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
GLVLSI
2009
IEEE
14 years 2 months ago
2009
IEEE
Networks-on-Chip (NoCs) become a critical design factor as chip multiprocessors (CMPs) and systems on a chip (SoCs) scale up with technology. With fundamental benefits of high ban...
CF
2005
ACM
13 years 9 months ago
2005
ACM
Power consumption within the memory hierarchy grows in importance as on-chip data caches occupy increasingly greater die area. Among dynamic power conservation schemes, horizontal...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
Dynamic voltage scaling (DVS) circuits have been widely adopted in many computing systems to provide tradeoff between performance and power consumption. The effective use of energ...
ISCAS
2002
IEEE
14 years 17 days ago
2002
IEEE
We have implemented an aspect of learning and memory in the nervous system using analog electronics. Using a simple synaptic circuit we realize networks with Hebbian type adaptati...