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» Using the DEVS Paradigm to Implement a Simulated Processor
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DATE
2006
IEEE
136views Hardware» more  DATE 2006»
14 years 2 months ago
Defect tolerance of QCA tiles
Quantum dot Cellular Automata (QCA) is one of the promising technologies for nano scale implementation. The operation of QCA systems is based on a new paradigm generally referred ...
Jing Huang, Mariam Momenzadeh, Fabrizio Lombardi
ISLPED
2007
ACM
57views Hardware» more  ISLPED 2007»
13 years 10 months ago
Resource area dilation to reduce power density in throughput servers
Throughput servers using simultaneous multithreaded (SMT) processors are becoming an important paradigm with products such as Sun's Niagara and IBM Power5. Unfortunately, thr...
Michael D. Powell, T. N. Vijaykumar
HPCA
2003
IEEE
14 years 9 months ago
Dynamic Optimization of Micro-Operations
Inherent within complex instruction set architectures such as x86 are inefficiencies that do not exist in a simpler ISAs. Modern x86 implementations decode instructions into one o...
Brian Slechta, David Crowe, Brian Fahs, Michael Fe...
WSC
1998
13 years 10 months ago
Applying Temporal Databases to HLA Data Collection and Analysis
The High Level Architecture (HLA) for distributed simulations was proposed by the Defense Modeling and Simulation Office of the Department of Defense (DOD) in order to support int...
Thom McLean, Leo Mark, Margaret L. Loper, David Ro...
ICCD
2003
IEEE
121views Hardware» more  ICCD 2003»
14 years 5 months ago
Distributed Reorder Buffer Schemes for Low Power
We consider several approaches for reducing the complexity and power dissipation in processors that use separate register file to maintain the commited register values. The first ...
Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad ...