Sciweavers

110 search results - page 13 / 22
» VLSI Circuit Synthesis Using a Parallel Genetic Algorithm
Sort
View
GLVLSI
2007
IEEE
135views VLSI» more  GLVLSI 2007»
14 years 1 months ago
Exact sat-based toffoli network synthesis
Compact realizations of reversible logic functions are of interest in the design of quantum computers. Such reversible functions are realized as a cascade of Toffoli gates. In th...
Daniel Große, Xiaobo Chen, Gerhard W. Dueck,...
VLSID
2002
IEEE
115views VLSI» more  VLSID 2002»
14 years 8 months ago
Logic Synthesis for AND-XOR-OR Type Sense-Amplifying PLA
In this paper, a new logic synthesis method for an AND-XOR-OR type sense-amplifying PLA is proposed. An AND-XOR-OR type sense-amplifying PLA can achieve lowpower dissipation and h...
Hiroaki Yoshida, Hiroaki Yamaoka, Makoto Ikeda, Ku...
GLVLSI
2010
IEEE
171views VLSI» more  GLVLSI 2010»
14 years 19 days ago
Timing-driven variation-aware nonuniform clock mesh synthesis
Clock skew variations adversely affect timing margins, limiting performance, reducing yield, and may also lead to functional faults. Non-tree clock distribution networks, such as ...
Ameer Abdelhadi, Ran Ginosar, Avinoam Kolodny, Eby...
GPEM
2006
97views more  GPEM 2006»
13 years 7 months ago
Evolving recursive programs by using adaptive grammar based genetic programming
Genetic programming (GP) extends traditional genetic algorithms to automatically induce computer programs. GP has been applied in a wide range of applications such as software ree...
Man Wong
ISQED
2005
IEEE
95views Hardware» more  ISQED 2005»
14 years 1 months ago
Power Supply Noise-Aware Scheduling and Allocation for DSP Synthesis
As technology scales down, power supply noise is becoming a performance and reliability bottleneck in modern VLSI. We propose a power supply noise-aware design methodology for hig...
Dongku Kang, Yiran Chen, Kaushik Roy