428 search results - page 27 / 86 » Validating High-Level Synthesis |
ASAP
1996
IEEE
14 years 3 months ago
1996
IEEE
A datapath synthesis system (DPSS) for a bus-based wavefront array architecture, called rDPA (reconfigurable datapath architecture), is presented. An internal data bus to the arra...
ISCAS
2003
IEEE
14 years 4 months ago
2003
IEEE
Improving testability during the early stages of High-Level Synthesis (HLS) has several benefits, including reduced test hardware overhead, reduced test costs, reduced design iter...
ISSS
1997
IEEE
14 years 3 months ago
1997
IEEE
Integer Linear Programming ILP is commonly used in high level and system level synthesis. It is an NP-Complete problem in general cases . There exists some tools that give an o...
ICCAD
1994
IEEE
14 years 3 months ago
1994
IEEE
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
ASPDAC
1995
ACM
14 years 2 months ago
1995
ACM
In this paper we describe, a powerful post-synthesis approach called reclocking, for performance improvement by minimizing the total execution time. By back annotating the wire del...